Design of CMOS Phase-Locked Loops
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Home > Science, Technology & Agriculture > Electronics and communications engineering > Electronics engineering > Electronics: circuits and components > Design of CMOS Phase-Locked Loops: From Circuit Level to Architecture Level
Design of CMOS Phase-Locked Loops: From Circuit Level to Architecture Level

Design of CMOS Phase-Locked Loops: From Circuit Level to Architecture Level


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About the Book

Using a modern, pedagogical approach, this textbook gives students and engineers a comprehensive and rigorous knowledge of CMOS phase-locked loop (PLL) design for a wide range of applications. It features intuitive presentation of theoretical concepts, built up gradually from their simplest form to more practical systems; broad coverage of key topics, including oscillators, phase noise, analog PLLs, digital PLLs, RF synthesizers, delay-locked loops, clock and data recovery circuits, and frequency dividers; tutorial chapters on high-performance oscillator design, covering fundamentals to advanced topologies; and extensive use of circuit simulations to teach design mentality, highlight design flaws, and connect theory with practice. Including over 200 thought-provoking examples highlighting best practices and common pitfalls, 250 end-of-chapter homework problems to test and enhance the readers' understanding, and solutions and lecture slides for instructors, this is the perfect text for senior undergraduate and graduate-level students and professional engineers who want an in-depth understanding of PLL design.

Table of Contents:
1. Oscillator fundamentals; 2. Introduction to jitter and phase noise; 3. Design of inverter-based ring oscillators; 4. Design of differential and multiphase ring oscillators; 5. LC oscillator design; 6. Advanced oscillator concepts; 7. Basic PLL architectures; 8. PLL design considerations; 9. PLL design study; 10. Digital phase-locked loops; 11. Delay-locked loops; 12. RF synthesis; 13. Clock and data recovery fundamentals; 14. Advanced clock and data recovery principles; 15. Frequency dividers.

About the Author :
Behzad Razavi is a Professor of Electrical Engineering at the University of California, Los Angeles. He has received numerous teaching and education awards, and is an IEEE Distinguished Lecturer, a member of the US National Academy of Engineering, and a Fellow of the IEEE. His previous textbooks include Fundamentals of Microelectronics (2008), RF Microelectronics (1997, 2nd edition 2011) and Design of Analog CMOS Integrated Circuits (1999, 2nd edition 2016).

Review :
'Yet another great book by Razavi, taking the readers on a journey from the basics to advanced topics on phase locked loops and clock and data recovery; beautifully written, intuitively explained.' Ali Sheikholeslami, University of Toronto 'Phase-locked loops are essential building blocks of modern electronic systems. Every Electrical Engineering graduate should understand how they work. There is no shortage of textbooks and monographs on the topic. Some are very mathematical but lack problem sets, others are cookbooks that lack rigour. This welcome addition to the field by Razavi addresses the needs of instructors, students, and practising design engineers. It motivates what functionality is required, explains what circuit and architectural ideas have worked, and how they have evolved to the best know solutions. Each chapter is mathematically rigorous, peppered with insightful examples, and rounded out with comprehensive problem sets. It is essential reading for teachers, learners and practitioners.' Peter Kennedy, University College Dublin 'CMOS phase-locked loops (PLLs) are essential blocks in nearly all modern electronic systems, so it is hard to overstate their importance. While academic papers and textbooks about PLLs abound, the lack of up-to-date, comprehensive, and clearly-written textbooks about CMOS PLLs have made it difficult for engineers to rapidly acquire a broad understanding of the subject. Design of CMOS Phase-Locked Loops by Behzad Razavi fills this void. It provides an extremely clear, intuitively appealing, one-stop introduction to the subject that is both broad and deep. It is a must-have textbook for engineers interested in learning about the subject, and a useful reference for experts.' Ian Galton, University of California, San Diego


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Product Details
  • ISBN-13: 9781108494540
  • Publisher: Cambridge University Press
  • Publisher Imprint: Cambridge University Press
  • Height: 259 mm
  • No of Pages: 506
  • Returnable: N
  • Spine Width: 27 mm
  • Weight: 1370 gr
  • ISBN-10: 1108494544
  • Publisher Date: 30 Jan 2020
  • Binding: Hardback
  • Language: English
  • Returnable: N
  • Returnable: N
  • Sub Title: From Circuit Level to Architecture Level
  • Width: 210 mm


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Design of CMOS Phase-Locked Loops: From Circuit Level to Architecture Level
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