Computer Hardware Description Languages and Their Applications
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Computer Hardware Description Languages and Their Applications: I.F.I.P.International Conference Proceedings

Computer Hardware Description Languages and Their Applications: I.F.I.P.International Conference Proceedings


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About the Book

The symposium on which this book is based has become established as the focal point for the meeting of experts in the field of formal descriptions of hardware and their use in analysis and synthesis of digital systems. The papers reflect the gradual shift from the original emphasis on the uses of language design to describe hardware, toward more formal techniques for specification and verification.

Table of Contents:
Simulation I. HDL Modeling for Process Oriented Simulation (M. Roumeliotis, J.R. Armstrong). Hardware Description and Simulation Using Concurrent Prolog (D. Weinbaum, E. Shapiro). Program-Specific and Architecture-Specific Simulators (B. Siegell, T. Gross). Analysis. Logical Analysis of Digital Circuits (I. Gertner, R.P. Kurshan). Analysis of Behavioral DACAPO Descriptions (R. Bruck, R. Klomps, J. Schuetz). Functional Extraction from Personality Matrixes of MOL (Matrix-Oriented Logic) Circuits (J. Gebhard et al.). Design (Systems). EDIF Standard Supports Version Control in CAD Systems (E.R. Marx). An Animated Modelling Environment for Parallel Architectures (D.C.A. Bulterman). Simulation II. MIAKA: A Microassembler for the Register Transfer Language KARL II (H. Bassmann, Ph. W. Besslich). Functional Fault Model Generation for Fault Coverage Estimation of VLSI Designs Using Syntax Directed Techniques (G.M. Silberman, I. Spillinger). A Meta-Assembler for Creating the Simulation Files of the Instruction Set Processor Specifications (S. Dasgupta, M.H. Ozcanhan). Design (Methods). On the Plausibility of Architectural Designs (S. Dasgupta, U. Aguero). Design Criteria and Formal Description Techniques (M. Daniels). A Digital Systems Design Methodology Based on Nets of Agencies (F.R. Wagner, C.M.D. Freitas, L.G. Golendziner). Invited Paper. Formal Verification of Hardware Correctness: An Introduction (P. Camurati, P. Prinetto). Verification I. Two Techniques for Automating Firmware Design Verification (R. Beccard et al.). Specification and Verification of VLSI Systems Actional Behaviour (T. Larsson). Verification II. REX - Shifting Functional Design Verification Towards RT-Level by Automatic Register-Transfer-Net Extraction (R.W. Hartenstein, W. Nebel). Modelling and Verification of Digital Systems Using Temporal Logic (G. Venkatesh). Petri Net Models for the Description and Verification of Parallel Bus Protocols (P. Civera et al.). Languages. The MoDL Hardware Design System (J. Smit et al.). Modern Object-Oriented Programming Language as an HDL (A. Pawlak, W. Wrona). Hardware Description with Recursion Equations (J.T. O'Donnell). Invited Paper. Electronic Design Automation at a Glance (J.P. Mermet).


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Product Details
  • ISBN-13: 9780444702357
  • Publisher: Elsevier Science & Technology
  • Publisher Imprint: Elsevier Science Ltd
  • Height: 230 mm
  • Sub Title: I.F.I.P.International Conference Proceedings
  • ISBN-10: 0444702350
  • Publisher Date: /11/1987
  • Binding: Hardback
  • Language: English
  • Width: 150 mm


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