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Yogesh Singh Chauhan

Yogesh Singh Chauhan

Yogesh Singh Chauhan is a Chair Professor in the Department of Electrical Engineering at the Indian Institute of Technology Kanpur, India. He is the developer of several industry standard models: ASM-HEMT, BSIM-BULK (formerly BSIM6), BSIM-CMG, BSI-IMG, BSIM4 and BSIM-SOI models. His research group is involved in developing compact models for GaN transistors, FinFET, nanosheet/gate-all-around FETs, FDSOI transistors, negative capacitance FETs and 2D FETs. His research interests are RF characterization, modeling, and simulation of semiconductor devices.

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FinFET/GAA Modeling for IC Simulation and Design
International Edition
Ships within 18-20 Days Explain..
2.
GaN Transistor Modeling for RF and Power Electronics
International Edition
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3.
BSIM-Bulk MOSFET Model for IC Design - Digital, Analog, RF and High-Voltage
International Edition
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Applied Artificial Intelligence (AI) to Green Power Technology
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