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Peter Onufryk

Peter Onufryk

Peter Z. Onufryk received his B.S.E.E. from Rutgers University, M.S.E.E. from Purdue University, and Ph.D. in Electrical and Computer Engineering from Rutgers University. He is currently a director in the Internetworking Products Division a Integrated Device Technology, Inc. where he is responsible for architecture definition and validation of communications products. Before joining IDT, Peter was a researcher for thirteen years at AT&T Labs - Research (formally AT&T Bell Labs) where he worked on communications systems and parallel computer architectures. These included a number of parallel, cache-coherent multiprocessor and dataflow based machines that were targeted towards high performance military systems. Other work there focused on packet telephony and early network processors. Onufryk is a member of the IEEE. He was an organizer and program committee member of the HPCA8 Workshop on Network Processors 2002. Peter was the architect of four communications processors as well as numerous ASICs, boards, and systems. Read More Read Less

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Network Processor Design
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AED422
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Release:
11 Mar 2005
Language:
English
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2.
Network Processor Design
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AED387
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Release:
02 Dec 2003
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English
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Network Processor Design
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AED477
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16 Oct 2002
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Network Processor Design
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AED308
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Release:
16 Oct 2002
Language:
English
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Network Processor Design
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AED446
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01 Jan 2005
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Network Processor Design
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AED461
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Release:
09 Jun 2008
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Network Processor Design
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AED485
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10 May 2014
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Network Processor Design
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AED361
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14 May 2014
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English
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Network Processor Design
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AED53
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14 May 2014
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