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Jaan Raik

Jaan RaikJaan Raik received his M.Sc. and Ph.D. degrees in Computer Engineering from Tallinn University of Technology (TUT) in 1997 and in 2001, respectively. Since 2002 he holds a position of senior research fellow at TUT. He is a member of IEEE Computer Socety, a Steering Committee member of European Dependable Computing Conference and Programme Committee member for many leading conferences (DATE, ETS, DDECS, etc.). Dr. Raik has co-authored more than 100 scientific publications. In 2004, he was awarded the national Young Scientist Award. In 2005, he served as the Organisation Chair of the IEEE European Test Symposium. He has carried out research work at several foreign institutes including Darmstadt University of Technology, INPG Grenoble, Nara Institute of Science and Technology (Japan), Fraunhofer Institute of Integrated Circuits (Dresden), University of Stuttgart and University of Verona. His main research interests include high-level test generation, fault tolerant design and verification. Dr. Raik was the local project lead for the VERTIGO FP6 STREP project on verification and is the coordinator of the DIAMOND FP7 STREP project. Read More Read Less

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1.
VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability
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VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability
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Design and Test Technology for Dependable Systems-on-Chip
Publisher: IGI Global
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AED876
Binding:
SA
Release:
31 Dec 2010
Language:
English
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4.
Structural Decision Diagrams in Digital Test
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AED1,113
Binding:
Paperback
Release:
16 Feb 2025
Language:
English
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5.
Design and Test Technology for Dependable Systems-on-Chip
Publisher: IGI Global
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AED734
Binding:
Digital download and online
Release:
31 Dec 2010
Language:
English
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6.
Design and Test Technology for Dependable Systems-on-Chip
Publisher: IGI Global
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AED734
Binding:
Digital download and online
Release:
31 Dec 2010
Language:
English
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7.
Design and Test Technology for Dependable Systems-On-Chip
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