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David V. Overhauser

David V. Overhauser

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1.
Digital Timing Macromodeling for VLSI Design Verification
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AED471
Binding:
Hardback
Release:
31 May 1995
Language:
English
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2.
Digital Timing Macromodeling for VLSI Design Verification
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AED693
Binding:
Paperback
Release:
03 Oct 2012
Language:
English
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3.
Switch-Level Timing Simulation of MOS VLSI Circuits
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4.
Switch-Level Timing Simulation of MOS VLSI Circuits
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5.
Switch-Level Timing Simulation of Mos VLSI Circuits
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