The VHDL Reference: A Practical Guide to Computer-Aided Integrated Circuit Design including VHDL-AMS

The VHDL Reference: The essential guide for students and professionals working in computer hardware design and synthesis. The definitive guide to VHDL, this book combines a comprehensive reference of the VHDL syntax with tutorial and workshop materials that guide the reader through the principles of digital hardware design. The Authors describe the concept of VHDL and VHDL-AMS for modelling and synthesis and explain how VHDL can be used for the design of digital systems. The CD-ROM features workshop and reference material to familiarise beginners with the use of VHDL for simulation and for synthesis. In-depth examples of VHDL construct are explained in compact and easy to follow form providing immediate help and answers to specific problems. Features include: * downloadable version of the VHDL Reference including demonstration tools and workshop material covering language aspects for digital systems. * Modelling tutorial featuring VHDL-AMS, the new standard for modelling and simulating mixed signal micro systems. Real-life examples enable the reader to test their knowledge and clarify their understanding of the concepts. * Design workshop format taking the reader through an entire circuit design using an actual design problem, allowing beginners to put their VHDL skills into practice. * A user friendly reference section providing in depth coverage of the VHDL language for digital systems. * Includes tools for editing VHDL source files, simulating and synthesising VHDL models. The VHDL Reference is a highly accessible single source reference to the industry standard language for computer-aided electronic system design. It is not only an essential guide for undergraduate and postgraduate students in electrical engineering but also an indispensable aid to researchers and hardware designers and teachers using VHDL and logic synthesis.

Table of Contents:
VHDL TUTORIAL. VHDL: Overview and Application Field. VHDL Language and Syntax. Synthesis. Simulation. Project Management. VHDL-AMS TUTORIAL. VHDL-AMS. VHDL WORKSHOP. VHDL Working Environment. Exercises. REFERENCE. Design Entities and Configurations. Subprograms and Packages. Types. Declarations. Specification. Names. Expressions. Sequential Statements. Concurrent Statements. Miscellaneous. Elaboration and Simulation. Lexical Elements. Predefined Attributes. Package STANDARD. Package TEXTIO. BNF. Literature. Index.