Domain Specific High-Level Synthesis for Cryptographic Workloads: (Computer Architecture and Design Methodologies)

This book offers an in-depth study of the design and challenges addressed by a high-level synthesis tool targeting a specific class of cryptographic kernels, i.e. symmetric key cryptography. With the aid of detailed case studies, it also discusses optimization strategies that cannot be automatically undertaken by CRYKET (Cryptographic kernels toolkit. The dynamic nature of cryptography, where newer cryptographic functions and attacks frequently surface, means that such a tool can help cryptographers expedite the very large scale integration (VLSI) design cycle by rapidly exploring various design alternatives before reaching an optimal design option. Features include flexibility in cryptographic processors to support emerging cryptanalytic schemes; area-efficient multinational designs supporting various cryptographic functions; and design scalability on modern graphics processing units (GPUs). These case studies serve as a guide to cryptographers exploring the design of efficient cryptographic implementations.  

Table of Contents:
Introduction.- Background.- Dwarfs of Cryptography.- High Level Synthesis for Symmetric Key Cryptography.- Manual Optimizations for Efficient Designs.- Study of Flexibility.- Study of Scalability.- Efficient Cryptanalytic Hardware.- Conclusion and Future Work.

About the Author :
Ayesha Khalid completed her B.E. in Computer Systems Engineering from National University of Sciences and Technology (NUST), Pakistan. She did her M.S. in Electrical Engineering from Center for Advanced Studies in Engineering (CASE), affiliated with University of Engineering and Technology, UET-Taxila, Pakistan. From 2000 to 2010, she served as a Lecturer in the Department of Electrical Engineering at Muhammad Ali Jinnah University, Islamabad and later joined RWTH Aachen, Germany as a Research Associate for her doctoral studies. She is the recipient of DAAD scholarship award for Ph.D. Her dissertation focuses on the identification, characterization and exploitation of representative cryptographic operations/ structures for a whole class of cryptography, enabling high-level synthesis of cryptographic proposals. Currently, she is working as a Research Fellow at Queens University Belfast (QUB) in the SAFECrypto project. Goutam Paul completed his undergraduate in Computer Engineering in 2001 from Bengal Engineering College (Deemed University), now Indian Institute of Engineering Science and Technology (IIEST), Shibpur, Howrah,  India; Master degree in Computer Science in 2003 from State University of New York (SUNY) at Albany, U.S.A.; and Ph.D. in Cryptology in 2009 from Indian Statistical Institute, Kolkata (degree awarded from Jadavpur University, Kolkata, India).From 2006 to 2013, he was an Assistant Professor in the Department of Computer Science and Engineering of Jadavpur University and during 2012-2013, he visited RWTH Aachen, Germany as a Humboldt Fellow. From August 2013, Goutam Paul has been serving the R. C. Bose Centre for Cryptology and Security of Indian Statistical Institute, Kolkata, as an Assistant Professor. He also received the Young Scientist Award from the National Academy of Sciences, India (NASI) in 2013. His doctoral research focussed on the analysis of RC4, the then most popular and most widely commercially deployed software stream cipher and also the then standard encryption tool for IEEE WiFi protocol; and his work revealed many critical weaknesses of the cipher and initiated a chain of subsequent research by others in this area. Later he also worked on the analysis of other stream ciphers like HC-128, Grain-v1, Salsa20. Recently, he has taken up keen interest in efficient hardware design of cryptographic primitives and in the analysis of BB84-like quantum key distribution protocols. Goutam Paul is the author of one book and more than 60 papers in peer-reviewed international journals and conferences. He regularly serves as the TPC member of many top conferences, reviewer of many premier journals and presents invited seminars in internationally acclaimed venues. He is a member of ACM and a senior member of IEEE. Anupam Chattopadhyay received his B.E. degree from Jadavpur University, India in 2000. He received his MSc. from ALaRI, Switzerland and PhD from RWTH Aachen in 2002 and 2008 respectively.From 2008 to 2009, he worked as a Member of Consulting Staff in CoWare R&D, Noida, India. From 2010 to 2014, he led the MPSoC Architectures Research Group in RWTH Aachen, Germany as a Junior Professor. Since September, 2014, he is appointed as an assistant Professor in SCE, NTU. During his PhD, he worked on automatic RTL generation from the architecture description language LISA, which was commercialized later by a leading EDA vendor. He developed several high-level optimizations and verification flow for embedded processors. In his doctoral thesis, he proposed a language-based modeling, exploration and implementation framework for partially re-configurable processors. Together with his doctoral students, he proposed domain-specific high-level synthesis for cryptography, high-level reliability estimation flows, generalization of classic linear algebra kernels and a novel multi-layered coarse-grained reconfigurable architecture. In these areas, he published as a (co)-author over 80 conference/ journal papers, several book-chapters and a book. Anupam served in several TPCs of top conferences, regularly reviews journal/ conference articles and presented multiple invited seminars/tutorials in prestigious venues. He is a member of ACM and a senior member of IEEE.