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Home > Science, Technology & Agriculture > Electronics and communications engineering > Electronics engineering > Electronics: circuits and components > The Data Center as a Computer: Designing Warehouse-Scale Machines(Synthesis Lectures on Computer Architecture)
The Data Center as a Computer: Designing Warehouse-Scale Machines(Synthesis Lectures on Computer Architecture)

The Data Center as a Computer: Designing Warehouse-Scale Machines(Synthesis Lectures on Computer Architecture)


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About the Book

Warehouse-scale computers (WSCs) power cloud computing and all the great web services we use daily, including recent advancements in Artificial Intelligence/Machine Learning (AI/ML). This book examines how WSCs treat the datacenter itself as one massive computer designed at warehouse scale, with hardware and software working in concert. The book details the architecture of WSCs and covers the main factors influencing their design, operation, and cost structure, as well as the characteristics of their software base. Each chapter contains real-world examples, including detailed case studies and previously unpublished details of the infrastructure used to power Google's online services. Though targeted at the architects and programmers of today's WSCs, this book will also be broadly interesting to those who just want to understand the infrastructure powering cloud computing and hyperscale and AI services. The fourth edition reflects six years of advancements since the previous edition and includes significantly revamped and enhanced content including four new chapters, new case studies, and completely-redone illustrations optimized for online reading. New topics include exascale AI processing, software-defined infrastructure, advanced networking, modular datacenter design, chip packaging and interconnects, silent data corruption, trusted computing, sustainability, and using AI to design better systems. Also new to this edition, the book includes a retrospective discussing key innovations and learnings from 25 years of warehouse-scale computing, and an annotated bibliography of our selection of top 25 papers from this period. Updated discussions of emerging trends and opportunities ensure that this revised edition will remain an essential resource for educators and professionals working on the next generation of WSCs. This is an open access book.

Table of Contents:
Acknowlegements.- Introduction.- Workloads and Software Infrastructure.- WSC Hardware Building Blocks.- Data Center Basics: Building, Power, and Cooling.- Energy and Power Efficiency.- Modeling Costs.- Dealing with Failures and Repairs.- Closing Remarks.- Bibliography.- Author Biographies.

About the Author :
Luiz Andre Barroso (1964-2023) has worked across several engineering areas including web search, software infrastructure, storage availability, energy efficiency, and hardware design. He was the first manager of Google's Platforms Engineering team, the group responsible for designing the company's computing platform, and currently leads engineering infrastructure for Google Maps. Prior to Google, he was a member of the research staff at Digital Equipment Corporation (later acquired by Compaq), where his group did some of the pioneering work on processor and memory system design for multi-core CPUs. He held a Ph.D. in computer engineering from the University of Southern California and B.S/M.S. degrees in electrical engineering from the PUC, Rio de Janeiro. Luiz was a Google Fellow, a Fellow of the ACM, and a Fellow of the American Association for the Advancement of Science. Urs Holzle served as Google's first vice president of engineering and led the development of Google's technical infrastructure from 1999 to 2024 and is now a Google Fellow. His responsibilities included the design and operation of the servers, networks, data centers, and software infrastructure that power Google's internal and external cloud platforms. He is also renowned for both his red socks and his free-range Leonberger, Yoshka (Google's original top dog). Urs grew up in Switzerland and received a master's degree in computer science from ETH Zurich and, as a Fulbright scholar, a Ph.D. from Stanford. While at Stanford (and then a start-up later acquired by Sun Microsystems), he invented fundamental techniques used in most of today's leading Java compilers. Before joining Google, he was a professor of computer science at the University of California, Santa Barbara. He is a Fellow of the ACM and AAAS, a member of the Swiss Academy of Technical Sciences and the National Academy of Engineering, and serves on the board of the US World Wildlife Fund. Parthasarathy (Partha) Ranganathan is a Google Fellow and the area tech lead for Google's computing systems and data center infrastructure. Prior to this, he was an HP Fellow and Chief Technologist at Hewlett Packard Labs, where he led their research on systems and data centers. Partha has worked on several interdisciplinary systems projects with broad impact on both academia and industry, including widely used innovations like energy-aware user interfaces, heterogeneous multi-cores, disaggregated and software-defined servers, energy-efficient servers and accelerators, and AI for systems. He has published extensively and is a co-inventor on more than 125 patents. He has been named a top-15 enterprise technology rock star by Business Insider, one of the top 35 young innovators in the world by MIT Tech Review, and is a recipient of the ACM SIGARCH Maurice Wilkes award and Rice University's Outstanding Young Engineering Alumni award. He is one of few computer scientists to have his work recognized with an Emmy award! Partha is also a Fellow of the IEEE and ACM.


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Product Details
  • ISBN-13: 9783031994883
  • Publisher: Springer International Publishing AG
  • Publisher Imprint: Springer International Publishing AG
  • Edition: Revised edition
  • Language: English
  • Returnable: N
  • Sub Title: Designing Warehouse-Scale Machines
  • ISBN-10: 3031994884
  • Publisher Date: 07 Dec 2025
  • Binding: Hardback
  • Height: 240 mm
  • No of Pages: 345
  • Series Title: Synthesis Lectures on Computer Architecture
  • Width: 168 mm


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