Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing
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Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing: Hardware Architectures

Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing: Hardware Architectures


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About the Book

This book presents recent advances towards the goal of enabling efficient implementation of machine learning models on resource-constrained systems, covering different application domains. The focus is on presenting interesting and new use cases of applying machine learning to innovative application domains, exploring the efficient hardware design of efficient machine learning accelerators, memory optimization techniques, illustrating model compression and neural architecture search techniques for energy-efficient and fast execution on resource-constrained hardware platforms, and understanding hardware-software codesign techniques for achieving even greater energy, reliability, and performance benefits.

Table of Contents:
Introduction.- Efficient Hardware Acceleration for Embedded Machine Learning.- Memory Design and Optimization for Embedded Machine Learning.- Efficient Software Design of Embedded Machine Learning.- Hardware-Software Co-Design for Embedded Machine Learning.- Emerging Technologies for Embedded Machine Learning.- Mobile, IoT, and Edge Application Use-Cases for Embedded Machine Learning.- Cyber-Physical Application Use-Cases for Embedded Machine Learning.

About the Author :
Sudeep Pasricha is a Walter Scott Jr. College of Engineering Professor in the Department of Electrical and Computer Engineering, the Department of Computer Science, and the Department of Systems Engineering at Colorado State University. He is Director of the Embedded, High Performance, and Intelligent Computing (EPIC) Laboratory and the Chair of Computer Engineering. Prof. Pasricha received the B.E. degree in Electronics and Communication Engineering from Delhi Institute of Technology, India, and his Ph.D. in Computer Science from the University of California, Irvine. He has several years of work experience in industry where his work focused on electronic chip design automation, model based design, and embedded system codesign. Prof. Pasricha has received more than $7M in funding for his research from various sponsors including the NSF, SRC, AFOSR, ORNL, DoD, Fiat-Chrysler, and NASA. He has co-authored multiple books, contributed to several book chapters, and published more than 250 research articles in peer-reviewed conferences, journals, and books. He has been part of panels, keynotes, and also organized special sessions and tutorials on his research areas at premier conferences. He is a Senior Member of the IEEE (Computer Society), Distinguished Member of the ACM, and an ACM Distinguished Speaker. Prof. Pasricha’s research broadly focuses on software algorithms, hardware architectures, and hardware-software co-design for energy-efficient, fault-tolerant, real-time, and secure computing. These efforts target multi-scale computing platforms, including embedded and Internet of Things (IoT) systems, cyber-physical systems, mobile devices, and datacenters. Prof. Pasricha has received 16 Best Paper Awards and Nominations at various IEEE and ACM conferences, including at DAC, ASPDAC, NOCS, GLSVLSI, SLIP, AICCSA, and ISQED. Other notable awards include: the 2019 George T. Abell Outstanding Research Faculty Award, the 2016-2018 University Distinguished Monfort Professorship, 2016-2019 Walter Scott Jr. College of Engineering Rockwell-Anderson Professorship, 2018 IEEE-CS/TCVLSI Mid-Career Research Achievement Award, the 2015 IEEE/TCSC Award for Excellence for a Mid-Career Researcher, the 2014 George T. Abell Outstanding Mid-career Faculty Award, and the 2013 AFOSR Young Investigator Award. Prof. Pasricha is currently the Vice Chair of ACM SIGDA and a Senior Associate Editor for the ACM Journal of Emerging Technologies in Computing (JETC). He is an Associate Editor for the ACM Transactions on Embedded Computing Systems (TECS), IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), IEEE Consumer Electronics (CM), and IEEE Design & Test of Computers (D&T). He also serves as the Chair of the Steering Committee of IEEE Transactions on Sustainable Computing (TSUSC). He is currently or has been an Organizing Committee Member of several IEEE/ACM conferences such as DAC, ESWEEK, ICCAD, GLSVLSI, NOCS, RTCSA, etc. He has served as the General Chair for various IEEE/ACM conferences such as NOCS, HCW, IGSC, iSES, ICESS, etc.; and as Program Chair for CODES+ISSS, NOCS, IGSC, iNIS, VLSID, HCW, DAC PhD Forum, ICCAD Cadathlon, etc. He is also in the Technical Program Committee of several IEEE/ACM conferences such as DAC, DATE, ICCAD, ICCD, NOCS, etc. He holds an affiliate faculty member position at the Center for Embedded and Cyber-Physical Systems at UC Irvine. He has also received multiple awards for professional service, including the 2019 ACM SIGDA Distinguished Service Award, the 2015 ACM SIGDA Service Award, and the 2012 ACM SIGDA Technical Leadership Award.   Muhammad Shafique received his Ph.D. degree in computer science from the Karlsruhe Institute of Technology (KIT), Germany, in 2011. Afterwards, he established and led a highly recognized research group at KIT for several years as well as conducted impactful R&D activities across the globe. Before KIT, he was with Streaming Networks Pvt. Ltd. where he was involved in research and development of video coding systems several years. In Oct.2016, he joined the Institute of Computer Engineering at the Faculty of Informatics, Technische Universität Wien (TU Wien), Vienna, Austria as a Full Professor of Computer Architecture and Robust, Energy-Efficient Technologies. Since Sep.2020, he is with the Division of Engineering at New York University Abu Dhabi (NYU-AD) in UAE, and is a Global Network faculty at the NYU’s Tandon School of Engineering (NYU-NY) in USA. He is the director of the eBrain research lab, and is also a Co-PI/Investigator in multiple large-scale research centers at NYUAD, including the Center of Artificial Intelligence and Robotics (CAIR), Center for Quantum and Topological Systems, Center of Cyber Security (CCS), and Center for InTeractIng urban nEtworkS (CITIES). Dr. Shafique has demonstrated success in leading team-projects, meeting deadlines for demonstrations, motivating team members to peak performance levels, and completion of independent challenging tasks. His experience is corroborated by strong technical knowledge and an educational record (throughout Gold Medalist). He also possesses an in-depth understanding of various video coding standards. His research interests are in brain-inspired computing, AI & machine learning hardware and system-level design, autonomous systems, wearable healthcare, energy-efficient systems, robust computing, hardware security, emerging technologies, FPGAs, MPSoCs, and embedded systems. His research has a special focus on cross-layer analysis, modeling, design, and optimization of computing and memory systems. The researched technologies and tools are deployed in application use cases from Internet-of-Things (IoT), smart Cyber-Physical Systems (CPS), and ICT for Development (ICT4D) domains. Dr. Shafique has given several Keynotes, Invited Talks, and Tutorials at premier venues. He has also organized many special sessions at flagship conferences (like DAC, ICCAD, DATE, IOLTS, and ESWeek), and has served as the Guest Editor for IEEE Design and Test Magazine (D&T), IEEE Transactions on Sustainable Computing (T-SUSC), IEEE Transactions on Embedded Computing (TECS), and Elsevier MICPRO. He has served as the TPC Chair of several conferences like IGSC, ISVLSI, PARMA-DITAM, RTML, ESTIMedia and LPDC; General Chair of ISVLSI, DDECS and ESTIMedia; Track Chair at DAC, ICCAD, DATE, IOLTS, DSD and FDL; and PhD Forum Chair of ISVLSI. He has also served on the program committees of numerous prestigious IEEE/ACM conferences including ICCAD, DAC, ISCA, DATE, CASES, ASPDAC, and FPL. He holds one US patent and has (co-)authored 6 Books, 15+ Book Chapters, 300+ papers in premier journals and conferences, and over 50 archive articles. Dr. Shafique received the prestigious 2015 ACM/SIGDA Outstanding New Faculty Award, the AI-2000 Chip Technology Most Influential Scholar Award in 2020, six gold medals in his educational career, and several best paper awards and nominations at prestigious conferences like CODES+ISSS, DATE, DAC and ICCAD, Best Master Thesis Award, DAC'14 Designer Track Best Poster Award, IEEE Transactions of Computer "Feature Paper of the Month" Awards, and Best Lecturer Award. Dr. Shafique is a senior member of the IEEE and IEEE Signal Processing Society (SPS), and a professional member of the ACM, SIGARCH, SIGDA, SIGBED, and HIPEAC.


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Product Details
  • ISBN-13: 9783031195679
  • Publisher: Springer International Publishing AG
  • Publisher Imprint: Springer International Publishing AG
  • Height: 235 mm
  • No of Pages: 412
  • Returnable: Y
  • Width: 155 mm
  • ISBN-10: 3031195671
  • Publisher Date: 02 Oct 2023
  • Binding: Hardback
  • Language: English
  • Returnable: Y
  • Sub Title: Hardware Architectures


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