Logical Effort
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Home > Computing and Information Technology > Computer science > Computer architecture and logic design > Logical Effort: Designing Fast CMOS Circuits(The Morgan Kaufmann Series in Computer Architecture and Design)
Logical Effort: Designing Fast CMOS Circuits(The Morgan Kaufmann Series in Computer Architecture and Design)

Logical Effort: Designing Fast CMOS Circuits(The Morgan Kaufmann Series in Computer Architecture and Design)


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About the Book

Designers of high-speed integrated circuits face a bewildering array of choices and too often spend frustrating days tweaking gates to meet speed targets. Logical Effort: Designing Fast CMOS Circuits makes high speed design easier and more methodical, providing a simple and broadly applicable method for estimating the delay resulting from factors such as topology, capacitance, and gate sizes. The brainchild of circuit and computer graphics pioneers Ivan Sutherland and Bob Sproull, logical effort will change the way you approach design challenges. This book begins by equipping you with a sound understanding of the method's essential procedures and concepts-so you can start using it immediately. Later chapters explore the theory and finer points of the method and detail its specialized applications.

Table of Contents:
1 The Method of Logical Effort2 Design Examples3 Deriving the Method of Logical Effort4 Calculating the Logical Effort of Gates5 Calibrating the Model6 Asymmetric Logic Gates7 Unequal Rising and Falling Delays8 Circuit Families9 Forks of Amplifiers10 Branches and Interconnect11 Wide Structures12 ConclusionsA Cast of CharactersB Reference process parametersC Logical Effort ToolsD Solutions

About the Author :
Ivan E. Sutherland, a vice president and fellow at Sun Microsystems, received the Turing Award and the Von Neumann Medal for his pioneering contributions in the fields of computer graphics and microelectronic design. Robert F. Sproull is an internationally noted expert on the design of graphics hardware and software. He too is a vice president and fellow at Sun. David Harris is the Harvey S. Mudd Professor of Engineering Design at Harvey Mudd College. He received his Ph.D. in electrical engineering from Stanford University and his M.Eng. in electrical engineering and computer science from MIT. Before attending Stanford, he worked at Intel as a logic and circuit designer on the Itanium and Pentium II processors. Since then, he has consulted at Sun Microsystems, Hewlett-Packard, Broadcom, and other design companies. David holds more than a dozen patents and is the author of three other textbooks on chip design, as well as many Southern California hiking guidebooks. When he is not working, he enjoys hiking, flying, and making things with his three sons.


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Product Details
  • ISBN-13: 9781558605572
  • Publisher: Elsevier Science & Technology
  • Publisher Imprint: Morgan Kaufmann Publishers In
  • Height: 235 mm
  • No of Pages: 256
  • Sub Title: Designing Fast CMOS Circuits
  • Width: 191 mm
  • ISBN-10: 1558605576
  • Publisher Date: 09 Feb 1999
  • Binding: Paperback
  • Language: English
  • Series Title: The Morgan Kaufmann Series in Computer Architecture and Design
  • Weight: 498 gr


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Logical Effort: Designing Fast CMOS Circuits(The Morgan Kaufmann Series in Computer Architecture and Design)
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