About the Book
Ce contenu est une compilation d'articles de l'encyclopedie libre Wikipedia. Pages: 66. Non illustre. Chapitres: Zilog Z80, SPARC, Optimisation des performances des architectures multi-c urs, Chronologie des microprocesseurs, RFLAGS, AMD64, Processeur double c ur, Traitement numerique, Itanium, Entrees-sorties, Loongson, MOS Technology 6502, Original Amiga chipset, Streaming SIMD Extensions, X86, Microprocesseur multi-c ur, Zilog Z80000, Reduced instruction set computer, Acceleration materielle, Very Long Instruction Word, Unite de calcul en virgule flottante, Xenon, PSoC, Processeur softcore, Microprogrammation, Saturn, IO-APIC, Cryptoprocesseur, Hyper-Threading, Front side bus, SuperH, DLX, DEC Alpha, Enveloppe thermique, Single Instruction Multiple Data, Intel GMA, Physics processing unit, Mot, 3DNow!, General-Purpose Processing on Graphics Processing Units, Tesla, Histoire economique du microprocesseur, RAD750, Simultaneous multithreading, PA-RISC, Complex instruction set computer, Architecture graphique avancee, System-on-a-chip, Multiple Instructions on Multiple Data, Explicitly Parallel Instruction Computing, Fab12, Mongoose-V, General Purpose Input/Output, Processeur optique, Bus d'adresse, Protocole de coherence de cache, Clipper chip, Page Attribute Table, Transputer, Phoenix Technologies, Performance Rating, Frequence d'horloge, Prediction de branchement, Cool'n'Quiet, Single Instruction on Single Data, Socket P, MIPSel, OverDrive, Low Insertion Force, Extended chipset, Socket M, Mvme68k, Stepping, 10 um, National Semiconductor SC/MP, YM2612, Rpeak, R10000, 3 um, Streaming SIMD Extension 2, YM2610, R4600, 800 nm, Intel Tera-Scale, 1.5 um, 1 um, Quad data rate, Focus, Sopc, MOS Technology 6507, Zilog Z8070, Coefficient multiplicateur, Blitter, MOS Technology 65C816, Memory Controller Hub, R4000, Lithographie en immersion. Extrait: Un microprocesseur multi-c ur (multi-core en anglais) est un processeur possedant plusieurs c urs...
