About the Book
Please note that the content of this book primarily consists of articles available from Wikipedia or other free sources online. Pages: 23. Chapters: MMX, Streaming SIMD Extensions, X86 instruction listings, SSE4, SSE2, SSE5, NOP, Advanced Vector Extensions, AES instruction set, VEX prefix, FMA instruction set, IF, Intel BCD opcode, LOADALL, XOP instruction set, SSSE3, X86 debug register, MOV, FCMOV, CLMUL instruction set, JMP, MOVAPD, HLT, MOVDDUP, MOVHPD, TEST, CVT16 instruction set, Load Task Register, Extended MMX. Excerpt: The x86 instruction set has been extended several times, introducing wider registers and datatypes and/or new functionality. This is the full 8086/8088 instruction set, but most, if not all of these instructions are available in 32-bit mode, they just operate on 32-bit registers (eax, ebx, etc.) and values instead of their 16-bit (ax, bx, etc.) counterparts. See also x86 assembly language for a quick tutorial for this processor family. The updated instruction set is also grouped according to architecture (i386, i486, i686) and more generally is referred to as x86_32 and x86_64 (also known as AMD64). Also MMX registers and MMX support instructions were added. They are usable for both integer and floating point operations, see below. SYSCALL, SYSRET (functionally equivalent to SYSENTER and SYSEXIT) Conditional MOV: CMOVA, CMOVAE, CMOVB, CMOVBE, CMOVC, CMOVE, CMOVG, CMOVGE, CMOVL, CMOVLE, CMOVNA, CMOVNAE, CMOVNB, CMOVNBE, CMOVNC, CMOVNE, CMOVNG, CMOVNGE, CMOVNL, CMOVNLE, CMOVNO, CMOVNP, CMOVNS, CMOVNZ, CMOVO, CMOVP, CMOVPE, CMOVPO, CMOVS, CMOVZ, SYSENTER (SYStem call ENTER), SYSEXIT (SYStem call EXIT), UD2 MASKMOVQ, MOVNTPS, MOVNTQ, PREFETCH0, PREFETCH1, PREFETCH2, PREFETCHNTA, SFENCE (for Cacheability and Memory Ordering) CLFLUSH, LFENCE, MASKMOVDQU, MFENCE, MOVNTDQ, MOVNTI, MOVNTPD, PAUSE (for Cacheability) CMPXCHG16B (CoMPare and eXCHanGe 16 Bytes), RDTSCP (ReaD Time Stamp Counter and Processor ID) LDDQU (for Video Encoding) MONITOR, MWAIT...
