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Home > Science, Technology & Agriculture > Electronics and communications engineering > Electronics engineering > Electronics: circuits and components > Digital Integrated Circuits: Analysis and Design
Digital Integrated Circuits: Analysis and Design

Digital Integrated Circuits: Analysis and Design


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About the Book

There is no field of enterprise today more dynamic or more challenging than Digital Integrated Circuits. But because of its rapid development, the field has quickly outgrown most of the standard textbooks. The field is also decidedly interdisciplinary. Engineers now must understand materials, physics, devices, processing electromagnetics, computer tools, and economics along with circuits and design rules, but few if any texts take the interdisciplinary approach that best prepares students for their future studies and practice. Author John Ayers designed Digital Integrated Circuits: Analysis and Design to meet three primary objectives: Take an interdisciplinary approach that will stay relevant for years to come Provide broad coverage of the field relevant to students interested in designing integrated circuits and to those aiming towards designing with integrated circuits Focus on the underlying principles rather than the details of current technologies that will soon be obsolete Rich with pedagogical features and supplementary materials, this book appears destined to set a new standard for digital integrated circuits texts. It provides all of the materials you need to offer the best possible course for engineering or computer science students, and it's clear, systematic presentation and wealth of solved examples build the solid, practical foundation today's students need. Prerequisites: Students will need an upper-level undergraduate engineering and science background with courses in circuits, electronics, and digital logic.

Table of Contents:
INTRODUCTION TO DIGITAL INTEGRATED CIRCUITS The Technological Revolution Electrical Properties of Digital Integrated Circuits Logic Families Computer-Aided Design and Verification Fabrication Testing and Yield Packaging Reliability Burn-In and Accelerated Testing Staying Current in the Field SEMICONDUCTOR MATERIALS Introduction Crystal Structure Energy Bands Carrier Concentrations Lifetime Current Transport Carrier Continuity Equations Poisson's Equation The Dielectric Relaxation Time DIODES Introduction Zero Bias (Thermal Equilibrium) Forward Bias Reverse Bias Switching Transients Metal-Semiconductor Diode SPICE Models Integrated Circuit Diodes PSPICE Simulations Laboratory Exercises BIPOLAR JUNCTION TRANSISTORS Introduction The Bipolar Junction Transistor in Equilibrium DC Operation of the Bipolar Junction Transistor The Ebers-Moll Model SPICE Model Integrated Bipolar Junction Transistors PSPICE Simulations Laboratory Exercises TRANSISTOR-TRANSISTOR LOGIC Introduction Circuit Evolution Using Kirchhoff's Voltage Law (KVL) in TTL Circuits Voltage Transfer Characteristic Dissipation Fan-Out Propagation Delays Logic Design Schottky TTL PSPICE Simulations: BJT Inverter PSPICE Simulations: TTL PSPICE Simulations: LSTTL Laboratory Exercises EMITTER-COUPLED LOGIC Introduction Circuit Evolution Using Kirchhoff's Voltage Law with ECL Circuits Voltage Transfer Characteristics Dissipation Propagation Delays Logic Design Temperature Effects in ECL ECL Circuit Families Active Pull-down ECL (APD ECL) Low-Voltage ECL (LV-ECL) PSPICE Simulations Laboratory Exercises FIELD EFFECT TRANSISTORS Introduction MOS Capacitor MOSFET Threshold Voltage Long-Channel MOSFET Operation Short-Channel MOSFETs MOSFET SPICE Models Integrated MOSFETs PSPICE Simulations Laboratory Exercises NMOS LOGIC Introduction Circuit Evolution Voltage Transfer Characteristic Dissipation Propagation Delays Fan-Out Logic Design PSPICE Simulations Laboratory Exercises CMOS LOGIC Introduction Voltage Transfer Characteristic Short-Circuit Current in CMOS Propagation Delays Dissipation Fan-Out Logic Design 4000 Series CMOS 74HCxx Series CMOS Buffered CMOS Pseudo NMOS Dynamic CMOS Domino Logic Latch-Up in CMOS Static Discharge in CMOS Scaling of CMOS PSPICE Simulations Laboratory Exercises LOW-POWER CMOS LOGIC Introduction Low-Voltage CMOS Multiple Voltage CMOS Dynamic Voltage Scaling Active Body Biasing Multiple Threshold CMOS Adiabatic Logic Silicon-on-Insulator (SOI) BiCMOS LOGIC Introduction Voltage Transfer Characteristic Propagation Delays Rail-to-Rail BiCMOS Logic Design PSPICE Simulations Laboratory Exercises GaAs DIRECT-COUPLED FET LOGIC Introduction Gallium Arsenide versus Silicon Gallium Arsenide MESFET Metal Semiconductor Junction MESFET Pinch-Off Voltage Long-Channel MESFET Operation Short-Channel MESFETs The Curtice Model for the MESFET MESFET SPICE Model Integrated MESFETs Direct-Coupled FET Logic PSPICE Simulations INTERFACING BETWEEN DIGITAL LOGIC CIRCUITS Introduction Level Shifting Circuits Wired Logic Transmission Gates Tri-State Logic PSPICE Simulations Laboratory Exercises INTERCONNECT Introduction Capacitance of Interconnect Resistance of Interconnect Inductance of Interconnect Lumped Capacitance Model Distributed Models Transmission Line Model Special Problems in Interconnect Design PSPICE Simulations BISTABLE CIRCUITS Introduction RS Latch RS Flip Flop JK Flip Flops Other Flip Flops Schmitt Triggers PSPICE Simulations Laboratory Exercises DIGITAL MEMORIES Introduction Static Random Access Memory (SRAM) Dynamic Random Access Memory (DRAM) Read Only Memory (ROM) Programmable Read Only Memory (PROM) Erasable Programmable Read Only Memory (EPROM) Electrically Erasable Programmable Read Only Memory (EEPROM) Flash Memory Access Times in Digital Memories Emerging Memory Technologies Design and Layout Introduction Photolithography and Masks Layout and Design Rules Physical Design of CMOS Circuits VLSI Design Principles Integrated Circuit Packages Introduction Package Types General Considerations Packaging Processes and Materials Appendix A: Properties of Si and GaAs at 300K Appendix B: Design Rules, Constants, Symbols, and Definitions Index Each chapter also contains Summary, References, and Problems sections.


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Product Details
  • ISBN-13: 9781135493981
  • Publisher: Taylor & Francis Ltd
  • Publisher Imprint: CRC Press
  • Language: English
  • No of Pages: 720
  • Returnable: N
  • ISBN-10: 1135493987
  • Publisher Date: 15 Dec 2003
  • Binding: Digital (delivered electronically)
  • No of Pages: 720
  • Returnable: N
  • Sub Title: Analysis and Design


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