Algorithms and Parallel Very Large Scale Integration Architectures: v. B International Workshop in Algorithms and Parallel VLSI Architectures, Abbaye des Premontres, Pont-a-Mousson, France, 10-16 June, 1990

In this second volume of Algorithms and Parallel VLSI Architectures Volume B: Proceedings are collected 50 papers which have been presented at the above mentioned Workshop. A companion volume entitled Algorithms and Parallel VLSI Architectures Volume A: Tutorials contains 21 lectures and tutorials presented at the conference. The research papers in this volume together with Volume A provide a balanced overview of the current interests in algorithms / architectures design for signal processing in computational algebra, communication and control, scientific and matrix computation, vizualization and computer graphics. The papers present some intriguing results from recent developments in the areas of network theory and linear algebra. All these groupings of disciplines are widely demonstrated in this volume's articles which are listed in six major sections.

Table of Contents:
A selection: Parts: 1. Least Squares Algorithms. The restricted total least squares problem and its use in system identification (S. Van Huffel). A general framework for a class of fast algorithms (J.R. Cruz). A class of jacobi-type updating algorithms (M. Moonen, J. Vandewalle). A VLSI-suited algorithm for solving linearly constrained least squares problems (M. Ali, J. Gotze). 2. Adaptive and Structured Filters. Formal power series representation of lossless distributed multiports in terms of Pade approximants (S. Basu, F.L. Fontaine). Adaptive weighted order statistic filters (L. Yin et al.). Fast VLSI implementation of CORDIC using redundancy (J. Duprat, J.M. Muller). 3. VLSI Signal Processing Architectures. A new algorithm for fast hardware Euclidian division (Y. Herreros). A neural net sized by data (N. Darbel et al.). Mathematical morphology architectures (A. Koch et al.). The machine paradigm of Xputers and its applications in DSP acceleration (R.W. Hartenstein et al.). 4. System Design. An efficient scheduling algorithm for systolic and semi-systolic array design (V. van Dongen). A compiler for generating dependence graphs of DSP algorithms (U. Vehlies, A. Crimi). In-place memory management of algebraic algorithms on application specific ICs (I. Verbauwhede et al.). A VLSI distributed digital signal processing network (R.A. McConnel et al.). 5. Computer Graphics. An improved parametric line clipping algorithm (Y.D. Liang, B.A. Barsky). A new space partitioning technique to support a highly pipelined parallel architecture for the radiosity method (L-S. Shen, E. Deprettere). A massively parallel heterogeneous VLSI architecture for MSIMD processing (G.R. Nudd et al.). 6. Large Scale Modeling. Massively parallel algorithms for numerical integration of partial differential equations (A. Fetweiss, G. Nitsche). Parallel implementation of the revised simplex algorithm using the explicit form of the inverse (J. Luo et al.). Implementation and evaluation of methods for solving large sparse systems of linear equations on a distributed memory multiprocessor (T. Bemmerl et al.).