VHDL for Programmable Logic

Practical, clearly organized, up-to-date and user-friendly, Kevin Skahill's VHDL for Programmable Logic gives you the tools you need to learn how to program in VHDL and how to use VHDL to synthesize circuits -- including a complete professional VHDL software tool, Warp2 from Cypress Semiconductor. Whether you are a student looking for a dynamic, real-world introduction to an industry-standard HDL, or a professional engineer in need of a fast, effective approach to VHDL, VHDL for Programmable Logic will get you up to speed. This hands-on tutorial explains the architecture, features, and technologies of programmable logic and teaches how to write VHDL code for synthesis. Many practical design examples focus on state machine design, counters, shifters, arithmetic circuits, control logic, FIFOs, and other "glue logic" that designers typically implement in programmable logic. FEATURES/BENEFITS *Practical design examples focus on state machine design, counters, shifters, arithmetic circuits, control logic, FIFOs, and other "glue logic" that designers typically implement in programmable logic. *Included with the book is a CD-ROM containing Cypress Semiconductor's Warp2, a fully functional professional VHDL synthesis tool for Windows PCs and Sun workstations. *Warp2 software does both CPLD and FPGA synthesis, as well as fitting, placement, and routing. *It includes an interactive waveform simulator that performs functional simulation of CPLD design. *Allows professionals to use VHDL to design, simulate, and implement digital systems in programmable logic. *System Requirements for Warp2: *Windows PC 486 or Pentium processor; 16 MB RAM; 60 MB hard disk space; *Windows 3.1 or Windows 95 *Sun Workstation *SPARC CPU; 16 MB RAM; 60 MB hard disk space; SunOS 4.1.1 or later

Table of Contents:
(NOTE: Each chapter begins with a Summary and ends with a Summary, Breakout Exercises and Problems). 1. Introduction. Why Use VHDL? Shortcomings. Using VHDL for Design Synthesis. Design Tool Flow. Our System. Font Conventions. 2. Programmable Logic Primer. Introduction. Why Use Programmable Logic? What Is a Programmable Logic Device? Simple PLDs. What Is a CPLD? What Is an FPGA? PREP Benchmarks. Future Direction of Programmable Logic. 3. Entities and Architectures. A Simple Design. Design Entities. Identifiers, Data Objects, Data Types, and Attributes. Common Errors. 4. Creating Combinational and Synchronous Logic. Design Example. Combinational Logic. Synchronous Logic. Designing a FIFO. Common Errors. Test Benches. 5. State Machine Designs. A Simple Design Example. A Memory Controller. Mealy State Machines. Additional Design Considerations. 6. Hierarchy in Large Designs. Case Study: The AM2901. Case Study: A 100BASE--T4 Network Repeater. 7. Functions and Procedures. Functions. Procedures. About Subprograms. 8. Synthesis and Design Implementation. Design Implementation: An Example. Synthesis and Fitting. CPLDs: A Case Study. FPGAs: A Case Study. 9. Optimizing Datapaths. Pipelining. Resource Sharing. Magnitude Comparators. Fast Counters. 10. Creating Test Benches. Approaches to Writing Test Benches. Overloaded Read and Write Procedures. Afterword. Review. Where To Go from Here. Appendix A: Viewing On-line Documentation and Installing Warp. Appendix B: Reserved Words. Appendix C: STD_logic_1164 Package. Appendix D: Quick Reference Guide. Glossary. Bibliography. Index.

About the Author :
About Kevin Skahill Kevin Skahill, a senior engineer at Cypress Semiconductor, has new product planning responsibilities for FPGAs and EDA tools. He has conducted VHDL short courses in the United States and throughout the world.