Semiconductor Process Reliability in Practice

Proven processes for ensuring semiconductor device reliability Co-written by experts in the field, Semiconductor Process Reliability in Practice contains detailed descriptions and analyses of reliability and qualification for semiconductor device manufacturing and discusses the underlying physics and theory. The book covers initial specification definition, test structure design, analysis of test structure data, and final qualification of the process. Real-world examples of test structure designs to qualify front-end-of-line devices and back-end-of-line interconnects are provided in this practical, comprehensive guide. Coverage includes: Basic device physics Process flow for MOS manufacturing Measurements useful for device reliability characterization Hot carrier injection Gate-oxide integrity (GOI) and time-dependent dielectric breakdown (TDDB) Negative bias temperature instability Plasma-induced damage Electrostatic discharge protection of integrated circuits Electromigration Stress migration Intermetal dielectric breakdown

About the Author :
Zhenghao GAN has extensive technical and management experience in research and development of semiconductor reliability improvement, testing/characterization, problem solving, project management, modeling, and analysis. He is currently a reliability technical manager at the Semiconductor Manufacturing International Corporation (SMIC), Shanghai, China and previously a research fellow at the School of Electrical and Electronic Engineering and School of Materials Science and Engineering, Nanyang Technological University, Singapore. Waisum WONG received his B.S. & M.S. degrees in electrical engineering from Mississippi State University in 1986 and 1988, respectively. He received his Ph.D. in electrical engineering from the University of Central Florida in 1992. He is currently in charge of process reliability at the Semiconductor Manufacturing International Corporation (SMIC), Shanghai, China, and previously has worked in power device development and modeling, mixed signal circuit design, MS SPICE modeling, RF device modeling, analog circuit design, high speed simulation support, and RF PDK development. Juin J. LIOU received his B.S., M.S., and Ph.D. degrees in electrical engineering from the University of Florida, Gainesville, in 1982, 1983, and 1987, respectively. He is now the Pegasus Distinguished Professor and UCF-Analog Devices Fellow in the Department of Electrical and Computer Engineering at the University of Central Florida (UCF), Orlando, Florida. His current research interests are micro/nanoelectronics computer-aided design, RF device modeling and simulation, and electrostatic discharge (ESD) protection design and simulation. Dr. Liou has published 8 books and has been awarded more than $9.0 million of research contracts and grants from federal agencies (NSF, DARPA, Navy, Air Force, NASA, NIST), state government, and industry (Semiconductor Research Corp., Intel Corp., Intersil Corp., Lucent Technologies, Alcatel Space, Conexant Systems, Texas Instruments, Fairchild Semiconductor, National Semiconductor, Analog Devices, RF Micro Device, Lockheed Martin). He has held consulting positions with research laboratories and companies in the United States, China, Japan, Taiwan, and Singapore.