About the Book
"Low-Cost Flip Chip Technologies: For DCA, WLCSP, and PBGA Assemblies", by John H. Lau, is the first comprehensive and in-depth guide to low-cost flip chip technologies. This reference gives you cutting edge information on the most important new developments and latest research results in applying flip chip technologies to direct chip attach (DCA) - also called flip chip on board (FCOB), wafer level chip scale package (WLCSP), and plastic ball grid array (PBGA) package assemblies. For professionals active in flip chip research and development, those who wish to master flip chip problem-solving methods, and those who must choose a cost-effective design and high-yield manufacturing process for their interconnect systems, here is a timely summary of progress in all aspects of this fascinating field. This one-stop guide meets the reference needs of engineers in the fields of design, materials, process, equipment, manufacturing, quality control, product assurance, reliability, component, packaging, marketing, and systems design, and technical managers working in electronic packaging and interconnection.
With this book you will develop a practical understanding of the economic, design, materials, process, equipment, quality, manufacturing, and reliability issues of low-cost flip chip technologies. Among the topics explored are: IC trends and packaging technology updates; more than 12 different wafer-bumping methods; more than 100 lead-free solder alloys; sequential build up PCB with microvias and via-in-pad; FCOB with anisotropic conductive film (ACF); FCOB with anisotropic conductive adhesive(ACA); solder-bumped FCOB with conventional underfills; solder-bumped FCOB with no-flow underfills; solder-bumped FCOB with imperfect underfills; physical and mechanical properties of underfills; how to select underfill materials; thermal management of solder-bumped FCOB; reliability of solder-bumped FCOB; failure analysis of solder-bumped FCOB; design, materials, process, and reliability of WLCSPs; solder-bumped flip chip in PBGA packages; fracture mechanics analysis of delaminations; and creep analysis of solder joints. Low-cost flip chip technology is taking the electronics industry by storm.
Page after page, this standard-setting guide gives you both essential technical details and an eye-opening overview of this fast-developing field. No matter how you use "Low-Cost Flip Chip Technologies For DCA, WLCSP, and PBGA Assemblies", you'll see why it's the resource of choice for those who want to be at the top of the game.
Table of Contents:
Chapter 1. Integrated Circuit Packaging Trends.
Chapter 2. Chip-Level Interconnects: Wire Bonds and Solder Bumps.
Chapter 3. Lead-Free Solders.
Chapter 4. High-Density PCB and Substrates.
Chapter 5. Flip Chip on Board with Solderless Materials.
Chapter 6. Flip Chip on Board with Conventional Underfills.
Chapter 7. Flip Chip on Board with No-Flow Underfills.
Chapter 8. Flip Chip on Board with Imperfect Underfills.
Chapter 9. Thermal Management of Flip Chip on Board.
Chapter 10. Wafer-Level Packaging.
Chapter 11. Solder-Bumped Flip Chip on Micro Via-in-Pad Substrates.
Chapter 12. PCB Manufacturing, Testing, and Assembly of RIMMs.
Chapter 13. Wire Bonding Chip (Face-Up) in PBGA Packages.
Chapter 14. Wire Bonding Chip (Face-Down) in PBGA Packages.
Chapter 15. Solder-Bumped Flip Chip in PBGA Packages.
Chapter 16. Failure Analysis of Flip Chip on Low-Cost Substrates.
About the Authors.
About the Author :
John H. Lau received his Ph.D. degree in Theoretical and Applied Mechanics from the University of Illinois (1977), a M.A.Sc. degree in Structural Engineering from the University of British Columbia (1973), a second M.S. degree in Engineering Physics from the University of Wisconsin (1974), and a third M.S. degree in Management Science from Fairleigh Dickinson University (1981). He also has a B.E. degree in Civil Engineering from National Taiwan University (1970). John is an interconnection technology scientist at Agilent Technologies, Inc. His current interests cover a broad range of electronic and optoelectronic packaging and manufacturing technology.
Prior to Agilent, he worked for Express Packaging Systems, Hewlett-Packard Company, Sandia National Laboratory, Bechtel Power Corporation, and Exxon Production and Research Company. With more than 30 years of R&D and manufacturing experience in the electronics, petroleum, nuclear, and defense industries, he has given over 200 workshops, authored and co-authored over 180 peer reviewed technical publications, and is the author and editor of 13 books: Solder Joint Reliability; Handbook of Tape Automated Bonding; Thermal Stress and Strain in Microelectronics Packaging; The Mechanics of Solder Alloy Interconnects; Handbook of Fine Pitch Surface Mount Technology; Chip On Board Technologies for Multichip Modules; Ball Grid Array Technology; Flip Chip Technologies; Solder Joint Reliability of BGA, CSP, Flip Chip, and Fine Pitch SMT Assemblies; Electronics Packaging: Design, Materials, Process, and Reliability; Chip Scale Package (CSP): Design, Materials, Process, Reliability, and Applications; Low Cost Flip Chip Technologies for DCA, WLCSP, and PBGA Assemblies, and Microvias for Low Cost, High Density Interconnects.
John served as one of the associate editors of the IEEE Transactions on Components, Packaging, and Manufacturing Technology and ASME Transactions, Journal of Electronic Packaging. He also served as general chairman, program chairman, and session chairman, and invited speaker of several IEEE, ASME, ASM, MRS, IMAPS, SEMI, and SMI International conferences. He received a few awards from ASME and IEEE for best papers and outstanding technical achievements, and is an ASME Fellow and an IEEE Fellow. He is listed in American Men and Women of Science and Who’s Who in America.
